Some Trivia about Silicon Diodes

About a century ago, the first (AM) radio receivers were made using coils, capacitors, and crude components as their only active one, called ‘Crystals’ (as well as high-impedance earphones). These crystals or ‘Whiskers’ were essentially diodes, formed from whatever mismatched pairs of conductive or semi-conductive substances a person could find, such as between ‘an iron wire’ and ‘the tarnish on a penny’. And a question which I’ve been asked was, “Why can’t the technology today just use a tuned circuit, and a silicon diode as the components?”

The answer is very basic. A silicon diode needs to have a forward voltage of at least 0.5V applied to it, before it goes from a non-conductive state to a conductive state. This is based on the Gap Energy of Silicon, or, the energy required to create an electron-electron-hole pair. It can happen that large diodes conduct some small amount of current at lower voltages, but this represents a region, in which their diffusion current is almost as low as their leakage current, which is constantly flowing in the opposite direction to the diffusion current. In short, in this sub-gap voltage-region, the diode fails to change in properties, as current flows through it in both directions, and fails to act as a diode. This amount of voltage is also referred to as ‘One Diode-Drop’.

The same thing happens between the Base and the Emitter of a Bipolar Transistor. In the NPN example, the Base must be at least one diode-drop more positive, and in the PNP example, it must be at least one diode-drop more negative than the Emitter, before the transistor ‘turns on’. This can frustrate people who try to create better rectifiers, just by connecting the Collector to the Base. This way, the curve that defines the current increases more sharply, but still only, after one diode-drop of voltage. But it can help IC designers, who want to keep Parasitic Transistors from turning on, and who can sometimes connect what would be the Base, and what would be the Emitter, of such a Parasitic Transistor, together.


 

(Update 7/30/2019, 0h05 : )

There is a related question which people do not generally ask me, but which I needed to know the answer to myself at some point in time. When the types of semiconductor components are drawn as a 2D layout, of a 3D construction, there is not only N-doped and P-doped silicon, but also N+ -doped and P+ -doped silicon. Why?

The answer lies in the fact that when a metal with a high work-factor, which is another way to say, with high electronegativity, comes into contact with regular, N-doped silicon, the electronegativity of the metal ‘draws away’ the majority free electrons, creating a region of silicon that behaves similarly to P-doped silicon. Right there, in that region, a “Schottky Barrier Diode” forms. And a problem in semiconductor manufacturing is, that this will happen every time the same type of metal comes into contact with the N-doped silicon, even if an Ohmic contact is desired.

Therefore, a type of N-doped silicon will be used as well, which has such an excess of dopant, that by itself, it fails to act as a semiconductor anymore. But, sandwiched between the metal and the regular N-doped silicon, it serves to form a contact, which is not a diode. In fact, if a single well of N-doped silicon has nothing but a metal junction at one end, but an N+ -doped (sub-)well with a metal contact at the other end, then what results is an actual Schottky Diode component, exploiting the junction effect on the end that does not use N+ -doped silicon. That end becomes the Anode, the side to which a positive potential needs to be applied, to result in forward conduction.

What some people might hope is that, if such a diode-type and N-doped well are incorporated into the P-doped substrate directly, this could lead to a simplified way to add diodes to CMOS logic.

However, I think that the WiKiPedia article exaggerates somewhat, about the degree by which the Schottky Diode has a lower voltage-drop, than a so-called ‘regular’ diode – a P-N diode. The diode-type which they mention: ‘1N5817′, according to my own data-sheets, only goes as low as 0.32V, at a temperature of 25⁰C. The target which the WiKiPedia suggests, of 0.15V, is only achieved at a temperature of 125⁰C. And that is pretty much the lowest-voltage of the Schottky Diodes. The voltage-drop is less than that for regular, P-N diodes, but at best, still half that.


 

Actually, the subject can be described in greater detail, of what the current-voltage relationship of diodes is. This requires understanding a fact about semiconductors, which is, that semiconductors only become that, above a certain temperature. Below that temperature they are insulators, and above an even higher temperature, they become regular, Ohmic conductors. This means that the thermal agitation energy of silicon is the main cause for the formation of its electron-electron-hole pairs.

Basically, a Schottky Diode is really just another diode, with a different set of parameters. The following article explains an approximation for computing the current that flows through a Schottky Diode:

https://www.pspice.com/resources/application-notes/modeling-schottky-diodes

This article explains the approximation for diodes in general:

https://en.wikipedia.org/wiki/Diode_modelling

Close inspection reveals that they are the same equation, essentially. This equation is also known as the “Schockley Diode Equation”. What it states in English is, that there is a constant amount of saturation current (IS), which is offset by an amount of diffusion current that is the antilogarithm of voltage. The fact that the saturation current is always flowing at a constant rate, and opposite the intended polarity, has been factorized out as the ( -1) of the term that follows (IS) both times. What this really means is that the zero-voltage (equilibrium) -current, as well as positive net currents, all exist somewhere as multiples of the same saturation current.

But there is also the Ideality Factor (N), of which the lowest numbers are most ideal, and which modulates how rapidly this antilogarithmic current changes as a function of voltage. I don’t think that (N) can become lower than (1.0).

Schottky Diodes are simply diodes, with another set of parameters. Their current curve is really continuous, just like that of regular, P-N diodes. But, they have an Ideality Factor close to (1.0), while, maybe, P-N diodes have closer to (2.0)?


 

Now, If one wanted to relate this equation to the Collector Current of a Bipolar Transistor, then one could say, that the resulting current has simply been multiplied by the transistor’s Current Gain…


 

Now, I have seen some semiconductor layouts, in which both N+ and P+ -doped silicon regions are used. But the question that I have about this is:

‘Presumably, only one type of metal coming into direct contact with the silicon is being used to make one type of IC. That type of metal can either be more electronegative or less electronegative than silicon. Therefore, it should only be necessary to use either N+ or P+ -doped silicon in the same IC, not both.’

And I have yet to see a good reply to that.

Dirk

 

An observation about the types of logic that can be etched into silicon.

One of the questions which I had blogged about before, was that, of whether the MOSFET transistor-type inherently has 3 pins or 4. This question has a practical aspect, which I did not mention in that posting, but which is eventually interesting.

When the very high-end Electrical Engineers design chips – ICs – and specifically, when they designed earlier-generation CMOS circuitry, they were not only limited by what the fundamental properties of a MOSFET were, but also, by how many layers the machines at the time could deposit onto the chip, each of which needed to be etched and treated in a separate, very precise stage of the manufacturing process. This is why I find it helpful that the WiKiPedia article I just linked to, displays a CMOS circuit, and how it was originally implemented, as their explanation of the subject.

What the reader may take note of, is the example of the P-channel MOSFET, which consists of a Source, a Drain, a Gate, a Bulk Electrode, and a Substrate. The role of this Bulk Electrode needs to be given some special attention. Because of the way these transistors were in fact etched, additional, unintentional, “parasitical” transistors could form, for example, a ‘hidden’ PNP, Bipolar Transistor, between the Drain, the N-doped well, and the P-doped substrate. In theory, if the N-doped well became negative enough, with respect to either the potential of the substrate or that of the P-doped Drain, then this parasitical transistor could become forward-biased, and start to conduct and amplify its own currents, with the Drain acting as Emitter, with the N-doped well acting as Base, and with the Substrate acting as Collector. The same thing could theoretically also happen, with the P-doped Source acting as Emitter instead.

The way this behaviour was prevented, was by connecting the N-doped well to the positive supply voltage, and always keeping the P-doped substrate connected to the negative supply voltage. This formed a so-called ‘isolation diode’, and prevented the parasitical transistor from becoming active.

Well in the circuit which I had clicked together using the NG-SPICE software, each MOSFET was a 4-pin component, and my main point of attention was on how to get my software to acknowledge whatever circuits I had entered. If the circuit in question needed to be etched, using the original technology, then the bulk electrode of each MOSFET would also need to be connected either to the negative supply voltage in the case of an N-channel MOSFET, or to the positive supply voltage in the case of a P-channel MOSFET. Hence, the existence of 3-pin MOSFETs was not due to whether the transistor-type was inherently so, but just due, to how certain forms of the technology were being manufactured, as consisting of a minimal number of layers. And this also forced the inclusion of the transistors as having 3 electrodes into certain schematics, just because their implementors could not implement the 4-electrode variety in certain cases – and in fact, often.

If the schematic was ever to be etched into silicon, as I drew it in my earlier posting, and as NG-SPICE was simulating it, then at the very least, a much-more recent form of Integrated Circuit would need to be used as architecture. And then one problem which would next follow would be, that this more-recent architecture also makes the transistors much smaller, such as 40 Nanometre or 10 Nanometre technology (?), which would result in individual transistors that cannot handle the amounts of current which discrete circuits require, so that the complications of driving output pins would become more pronounced.

One reason for which I did not elaborate this fact in my past posting was the realization that I’d have to link to yet-another WiKi-page in order to do so, and that WiKiPedia articles get edited from time to time. I did not know that the WiKi would keep the traditional layout of the CMOS layers a part of their article for so long.

Continue reading An observation about the types of logic that can be etched into silicon.