Variable-Gain Amplifier, adapted for etching into silicon.

One of the subjects which I’ve blogged about before was, The design of a variable-gain amplifier stage, that was really a variable-attenuation stage. This stage was neither suited for direct implementation with discrete components, nor on an IC. The reason for the latter detail was, that that circuit still contained coupling capacitors. Those are difficult to implement on an IC. However, I’ve done my best to do so now, in order to design a stage, which can be etched onto an IC.

My strategy for implementing a coupling capacitor was, that I’d tie the Source, Drain and Bulk electrodes of a P-channel MOSFET together on the side of the input, and use the Gate as output. However, since the N-doped well of a P-channel MOSFET also has capacitance to the substrate, I added a schematic component, that would be a ‘Semiconductor Capacitor’ according to ‘NG-SPICE‘, and the rectangular dimensions of which would just be slightly larger in each direction, than those of the MOSFET. This is meant to simulate the added, unwanted bypass-capacitor, which the preceding transistor-stage would need to be able to overpower.

This is the schematic:

Default_NM_Gain_IF_6

These are the model-cards used:

http://dirkmittler.homeip.net/text/NMOS2.mod.txt

http://dirkmittler.homeip.net/text/PMOS2.mod.txt

http://dirkmittler.homeip.net/text/JUNCCAP1.mod.txt

And this was the Net-List that defines both the circuit, and one of the simulations:

http://dirkmittler.homeip.net/text/Default_NM_Gain_IF_6.net.txt

Obviously, on an actual IC, the capacitor ‘C1′ would not exist either. Instead, a presumed preceding stage would have another transistor, that does what ‘MC1′ does in this stage.

The concept behind this circuit was, that ‘M1′ is a working inverting amplifier with reasonable voltage gain – in the ballpark of ~18, if there was no circuitry designed to make it attenuate a signal. Simply because the voltage-divider exists between ‘R2′ and ‘R3′ at the input, that goes down to ~9. Additionally, the fact that ‘R5′ follows ‘MC1′, brings the voltage-gain down to ~6, when the control-voltage is 3.0V. But, as ‘M3′ starts to conduct, it starts to feed the inverted signal from the coupling-capacitor back to the Gate, where the feedback competes with the current being fed by ‘R2′. The higher the gain of ‘M1′ is, the better the negation of the signal is, that results.

All outputs should have some sort of load indicated, so I added ‘R5′. In fact, I get the impression that NG-SPICE runs into difficulty simulating an output-voltage, if there is no load resistor. But in reality, the current that flows from the Source to the Drain of ‘M3′ will also see to it that any following, chained stages are biased as this stage was biased. (:1)

This circuit has a surprising, simulated behaviour, in that it will regulate the output voltage down, almost to zero, as the control voltage increases between 4.1V and 4.25V…

(Updated 7/30/2019, 10h20 … )

Continue reading Variable-Gain Amplifier, adapted for etching into silicon.

Playing with NG-SPICE again, and designing two resonant-circuit bandpass filters.

NG-SPICE is a program designed to simulate circuits. The acronym stands for (Next Generation) Simulation Program, with Integrated Circuit Emphasis. While NG-SPICE is open-source, its cousins such as LT-SPICE and PSpice are proprietary. However, NG-SPICE also uses advanced Mathematical modelling of components and circuits. Sometimes I find it to be an educational toy.

A type of circuit which some people might find interesting, is the IF strip – the Intermediate Frequency stage – of a radio receiver, which receives its signal after the Radio-Frequency signal has been ‘mixed’ with a Local Oscillator, and heterodyned down to the Intermediate Frequencies. And due to modern technology, a final, intermediate frequency of 450kHz can be used both for AM and FM demodulation.

There is a type of resonant circuit that employs capacitors and inductors – i.e., coils, in order to accomplish two things:

  • To act as a bandpass filter, restricting the frequency range,
  • To establish a phase-shift between the incoming carrier wave, and an oscillating, derived wave, that is dependent on the momentary frequency of the carrier wave, so that later in the analog processing of the signal, a phase-discriminator can complete the task of FM demodulation. This task is also referred to as Quadrature Demodulation of an FM carrier.

This type of resonant circuit is also sometimes referred to as a “Tank Circuit”.

In short, I’ve been reinventing the wheel. But I did read an article from elsewhere on the Internet, which inspired me. The subject of that article was, how to design Varactors, which are variable-capacitance diodes, when restricted to only using CMOS transistor-pairs. These diodes would represent a good way to tune circuits and vary the frequency of oscillators, in many types of applications. But I had an application in mind, which this type of varactor would help me solve. The mentioned, “IMOS Varactors” are remarkable because they don’t actually involve any diodes. They involve a way to connect an enhancement-mode P-channel MOSFET, so that the effect of gate-voltage changes on the MOSFET’s gate capacitance, acts as a varactor.

 

If somebody is designing a tuned circuit using the smallest, most-modern coils, manufactured by high-tech factories, then those coils allow for a high Q-factor to exist, which is a measure of how selective the filter can become, as well as to have good thermal stability, but if they are on a budget, these components will have some amount of tolerance, meaning that in a constant way, each component’s actual inductance value will vary to some degree. This is especially unfortunate since high-quality inductors on a budget, are also unlikely to be tunable. If the inductor in question is of a better sort, that ‘only’ has 5% tolerance, this would mean that with an improperly designed radio tuned to an intended AM frequency of 800kHz, instead, the listener could end up receiving a station at 780kHz, or at 820kHz, just because this one filter’s frequency is off by 5%. Of course, real radios that are designed to any level of satisfaction don’t behave that way.

What can be done, is that in the assembly-process for the radio, some machine calibrates its tuned circuits. But again, a maximal use of the main integrated circuit is assumed, and a minimal expense of external, discrete components is assumed. Here, a trimming potentiometer is a more-affordable way to do, what back in the 1970s and 1980s, tunable inductors would have done. If the assumption was made that for reasons I won’t go in to here, The IC can hold an exact voltage steady, then this voltage can also be applied to varactors internal to the IC, in a way that corrects for whatever amount of error was present in the coil.

Even though today, tunable inductors can be bought in quantity that also offer a Q-factor of 48, those aren’t just more expensive than the fixed variety. In addition, those would be much larger components, measuring maybe ‘half a centimetre’ cubed, and requiring to be soldered in to the circuit-board, while the fixed sort can be much smaller units, soldered onto a circuit-board as a surface-mounted device.

And so, reinventing the wheel in order to educate myself, what I have done was to design two circuits, one of which tunes in to 450kHz with the aid of such monolithic varactors, and the second of which does the same at 10Mhz instead. I’m using transistors that are not the tiniest in existence, but which are still too tiny, for an implementation of these ideas to be attempted with discrete components. Capacitances in picofarads should act as a warning to any reader, not to try this with discrete components. It’s much less-risky financially, just to run some simulations using NG-SPICE…

(Updated 7/27/2019, 12h05 … )

Continue reading Playing with NG-SPICE again, and designing two resonant-circuit bandpass filters.

The secret, to obtaining high-performance monolithic MOSFETs, under NG-SPICE.

One fact which I already blogged about in This Posting and This Posting, had to do with my frustration, at getting poor transistor behaviour, with enhancement-mode, N-channel MOSFETs, using the circuit simulation program called NG-SPICE.

For people who do not know, ‘SPICE’ stands for “Simulation Program, with Integrated Circuit Emphasis”. And NG-SPICE just happens to be the open-source version of it. Under Payware there are also ‘LT-SPICE’ and ‘P-SPICE’, to name a few.

Apparently, the default values which NG-SPICE puts, for the channel-length and channel-width of these MOSFETs, are just not suited for any purpose. Those are, 100μ x 100μ . And, NG-SPICE has as added drawback, that the power-user cannot just insert his customized parameters into the model-card – that defines a certain transistor-type – where they get ignored, but must put them at the end of every model-line, where the component is included in the circuit. It ‘kind of makes sense‘, since, with real ICs, the layout can be changed with every instance, but not the oxide layer thickness. But it’s also difficult to work with.

Apparently, the way to overcome that problem is, to keep the channel-widths at 100μ  , but to shorten the channel-lengths to 1μ . It gives much better results.

If the user has done this, then of course he must also recompute the optimal bias for the entire circuit, meaning the regulating resistor-values, if the goal is to keep bias-current the same. Apparently, VT0 was always a decent value (formerly ~1.8V), but the gate voltage needed to exceed this parameter by too many volts (with the  default parameters), to obtain appreciable current-flow.


 

If in saturation mode, the resulting N-channel MOSFET is to keep conducting 3.75μA, then the correct bias-voltage is ~1.7V. And the amount of available voltage-gain then, at a 3V supply voltage properly bisected, is around 18 (-). This does imply that with the new parameters, VT0 has improved by becoming smaller.

Yet, I’m still detecting an active-circuit Gate capacitance of 0.7pF. This could continue to make the design of very-high-frequency VCOs difficult. But, lower resistance values can now be chosen as components of such a VCO (at the Drain of the transistor), such as with an Astable Multivibrator, due to the better transconductance, aka ‘KP’. The constancy of the Gate capacitance strikes me as logical, since I haven’t changed the channel-width. This capacitance is usually more, with respect to the Drain, than it is, with respect to the Source or Bulk. The capacitance with respect to the Drain is likely to have been amplified, by the (inverted) voltage-gain of the stage. If that was taken out of the equation, a total of ~106fF would be apparent.

Dirk

 

NG-SPICE: Biasing the Default Transistor for Ideal Linear Voltage Gain, at 3V.

In recent days and weeks, I’ve been studying some of my own ideas, concerning the creative uses of the N-Channel, Enhancement-Mode, MOSFET. And to help me explore that subject, I’ve used An Open-Source Circuit Simulation Program called ‘NG-SPICE’. One big problem with this approach is the fact that the default transistor that the software assumes the power-user wants to use, is clearly not meant for Linear Voltage Amplification in the 100kHz-1.0Mhz frequency range, and with a 3V supply voltage. This transistor type is meant to be operated at higher voltages, and mainly, for digital uses. All the software is geared for Integrated Circuit Emphasis. But, I have looked at possible ways in which the default transistor could still be used under the conditions I’m more interested in. In theory, I could change the parameters of the transistor involved as much as I like, until I’ve made a high-speed, low-voltage transistor out of it. One problem with that is the fact that I give the software the geometry of the transistor on a chip, and the software then derives many of its assumed properties. I don’t know much about IC design, so I probably would not obtain the kind of transistor I’m looking for, if I tried to invent one.

So the question comes back, what is the best way to bias this one, arbitrary transistor-type, to act as a high-impedance amplifier under the conditions written above? And how much gain does it give me? The answer seems to be, that when connected as below, the best performance I can obtain is an Alpha of (-5.25):

Default_NM_Gain_IF_1

What I’ve also learned is, that the bias voltage associated with this circuit, with respect to ground, is (+2.14V). With respect to the supply voltage, that is (-0.86V). 3.75μV of bias current would need to flow. This information would be useful if an attempt ever came along to implement This Idea.

(Edit 7/5/2019, 17h15 : )

Doubling (VGS – VT0) of M1 would have as effect, that IDS quadruples. It would also have as effect, that equal, small changes in Gate Voltage translate into doubled changes in IDS. But, if the increase in bias current was taken into account by the circuit designer, by putting a resistor of merely 100kΩ in series with M1, thereby achieving that the supply voltage was ideally halved again as a result, then this would finally have as effect to halve the net voltage gain at the Drain of M1.

It would also have as effect, to quarter output impedance, which would be desirable from the last of a series of these stages, ending in a realistic load of some kind.

(End of Edit, 7/5/2019, 17h15.)

The Model-Card of the transistor is linked below:

http://dirkmittler.homeip.net/text/NMOS1.mod.txt

To pursue the exact subject of the earlier posting, about Variable-Gain Amplifiers, I also felt that it would be necessary to add to the circuit the components, that would transform it into a variable attenuator. And the following schematic shows how I did that:

(Updated 7/16/2019, 7h50 … )

Continue reading NG-SPICE: Biasing the Default Transistor for Ideal Linear Voltage Gain, at 3V.