## Is it valid that audio equipment from the 1970s sound better than modern equipment?

That depends on which piece of audio equipment from the 1970s, is being compared with which piece of equipment from today.

If the equipment consists of a top-quality turntable from the late 1970s, compared to the most basic MP3-player from today, and if we assume for the moment that the type of sound file which is being played on the Portable Audio Player, is in fact an MP3 File recorded at a bit-rate of 128kbps, then the answer would be Yes. Top-quality turntables from the late 1970s were able to outperform that.

OTOH, If the audio equipment from today is a Digital Audio Player, that boasts 24-bit sound, that only happens to be able to play MP3 Files, but that is in fact playing a FLAC File, then it becomes very difficult for even the better audio equipment from the 1970s to match that.

Top-Quality Audio Equipment from the late 1970s, would have cost over $1000 for one component, without taking into account, how many dollars that would have been equivalent to today. The type of Digital Audio Player I described cost me C$ 140.- plus shipping, plus handling, in 2018.

Also, there is a major distinction, between any sort of equipment which is only meant to reproduce an Electronic signal, and equipment which is Electromechanical in nature, including speakers, headphones, phonographs… ‘The old Electromechanical technology’ was very good, except for the basic limitation, that they could not design good bass-reflex speakers, which require computers to design well. With no bass-reflex speakers, the older generations tended to listen to stereo on bigger, expensive speakers. But their sound was good, with even bass.

## Variable-Gain Amplifier, adapted for etching into silicon.

One of the subjects which I’ve blogged about before was, The design of a variable-gain amplifier stage, that was really a variable-attenuation stage. This stage was neither suited for direct implementation with discrete components, nor on an IC. The reason for the latter detail was, that that circuit still contained coupling capacitors. Those are difficult to implement on an IC. However, I’ve done my best to do so now, in order to design a stage, which can be etched onto an IC.

My strategy for implementing a coupling capacitor was, that I’d tie the Source, Drain and Bulk electrodes of a P-channel MOSFET together on the side of the input, and use the Gate as output. However, since the N-doped well of a P-channel MOSFET also has capacitance to the substrate, I added a schematic component, that would be a ‘Semiconductor Capacitor’ according to ‘NG-SPICE‘, and the rectangular dimensions of which would just be slightly larger in each direction, than those of the MOSFET. This is meant to simulate the added, unwanted bypass-capacitor, which the preceding transistor-stage would need to be able to overpower.

This is the schematic:

These are the model-cards used:

http://dirkmittler.homeip.net/text/NMOS2.mod.txt

http://dirkmittler.homeip.net/text/PMOS2.mod.txt

http://dirkmittler.homeip.net/text/JUNCCAP1.mod.txt

And this was the Net-List that defines both the circuit, and one of the simulations:

http://dirkmittler.homeip.net/text/Default_NM_Gain_IF_6.net.txt

Obviously, on an actual IC, the capacitor ‘C1′ would not exist either. Instead, a presumed preceding stage would have another transistor, that does what ‘MC1′ does in this stage.

The concept behind this circuit was, that ‘M1′ is a working inverting amplifier with reasonable voltage gain – in the ballpark of ~18, if there was no circuitry designed to make it attenuate a signal. Simply because the voltage-divider exists between ‘R2′ and ‘R3′ at the input, that goes down to ~9. Additionally, the fact that ‘R5′ follows ‘MC1′, brings the voltage-gain down to ~6, when the control-voltage is 3.0V. But, as ‘M3′ starts to conduct, it starts to feed the inverted signal from the coupling-capacitor back to the Gate, where the feedback competes with the current being fed by ‘R2′. The higher the gain of ‘M1′ is, the better the negation of the signal is, that results.

All outputs should have some sort of load indicated, so I added ‘R5′. In fact, I get the impression that NG-SPICE runs into difficulty simulating an output-voltage, if there is no load resistor. But in reality, the current that flows from the Source to the Drain of ‘M3′ will also see to it that any following, chained stages are biased as this stage was biased. (:1)

This circuit has a surprising, simulated behaviour, in that it will regulate the output voltage down, almost to zero, as the control voltage increases between 4.1V and 4.25V…

(Updated 7/30/2019, 10h20 … )

## NG-SPICE: Biasing the Default Transistor for Ideal Linear Voltage Gain, at 3V.

In recent days and weeks, I’ve been studying some of my own ideas, concerning the creative uses of the N-Channel, Enhancement-Mode, MOSFET. And to help me explore that subject, I’ve used An Open-Source Circuit Simulation Program called ‘NG-SPICE’. One big problem with this approach is the fact that the default transistor that the software assumes the power-user wants to use, is clearly not meant for Linear Voltage Amplification in the 100kHz-1.0Mhz frequency range, and with a 3V supply voltage. This transistor type is meant to be operated at higher voltages, and mainly, for digital uses. All the software is geared for Integrated Circuit Emphasis. But, I have looked at possible ways in which the default transistor could still be used under the conditions I’m more interested in. In theory, I could change the parameters of the transistor involved as much as I like, until I’ve made a high-speed, low-voltage transistor out of it. One problem with that is the fact that I give the software the geometry of the transistor on a chip, and the software then derives many of its assumed properties. I don’t know much about IC design, so I probably would not obtain the kind of transistor I’m looking for, if I tried to invent one.

So the question comes back, what is the best way to bias this one, arbitrary transistor-type, to act as a high-impedance amplifier under the conditions written above? And how much gain does it give me? The answer seems to be, that when connected as below, the best performance I can obtain is an Alpha of (-5.25):

What I’ve also learned is, that the bias voltage associated with this circuit, with respect to ground, is (+2.14V). With respect to the supply voltage, that is (-0.86V). 3.75μV of bias current would need to flow. This information would be useful if an attempt ever came along to implement This Idea.

(Edit 7/5/2019, 17h15 : )

Doubling (VGS – VT0) of M1 would have as effect, that IDS quadruples. It would also have as effect, that equal, small changes in Gate Voltage translate into doubled changes in IDS. But, if the increase in bias current was taken into account by the circuit designer, by putting a resistor of merely 100kΩ in series with M1, thereby achieving that the supply voltage was ideally halved again as a result, then this would finally have as effect to halve the net voltage gain at the Drain of M1.

It would also have as effect, to quarter output impedance, which would be desirable from the last of a series of these stages, ending in a realistic load of some kind.

(End of Edit, 7/5/2019, 17h15.)

The Model-Card of the transistor is linked below:

http://dirkmittler.homeip.net/text/NMOS1.mod.txt

To pursue the exact subject of the earlier posting, about Variable-Gain Amplifiers, I also felt that it would be necessary to add to the circuit the components, that would transform it into a variable attenuator. And the following schematic shows how I did that:

(Updated 7/16/2019, 7h50 … )

## Intrinsic Silicon

Many people already understand, that two types of silicon exist, N+ -Doped, and P -Doped.

Well I’ve known for some time, that another type of silicon which exists, is called ‘Intrinsic Silicon’. This is a form of silicon, which theoretically contains no dope at all, and which is therefore non-conductive. It’s not even a semiconductor in that state.

This type of silicon might be of some interest in the design of modern Integrated Circuits, especially in the reduction of the capacitance of individual transistors. But there are  essentially two problems with its use:

1. It’s practically impossible for the silicon to be perfectly pure. The concentrations of Dope, in the N+ or P -Doped silicon, are already extremely low. The concentration of impurities in Intrinsic Silicon is simply lower, industrially, than in the intentionally-doped silicon, not truly zero. And what this means in practice, is that ‘larger pieces’ of Intrinsic Silicon are still partially conductive. In fact, how low the concentrations of N+ or P -Dope can be brought in the industrial process, depends on how low the level of impurities is, in the silicon, to begin with. In either type of intentionally-doped silicon, the concentration of dope must still be at least one order of magnitude greater, than the level of impurities was.
2. Actually, I think that Intrinsic Silicon is more expensive in bulk, than either type of intentionally-doped silicon, which means, that if the entire wafer needed to be made out of it, since the substrate of the wafer is meant to provide mechanical support as well, then the cost of the manufacturing process would increase.

Yet, small pieces of Intrinsic Silicon, as the following image shows, can still be used to provide lateral insulation, between the P -Doped and the N+ -Doped wells of individual transistors, where a “buried oxide layer” provides vertical insulation between those wells, and the actual wafer: