Why the Simpson’s Sum Does Not Get Used In Circuit Simulations

In recent postings I have been sharing my experiences, learning to use the software ‘NG-SPICE’, which uses numerical methods to simulate circuit-diagrams. Well, to simulate ‘Netlists’ anyway, that represent circuits. And the GUI which I have has as drawback, not being as fancy as some commercial GUIs, and only allowing me to perform certain types of simulations, that include DC Sweeps, AC Sweeps, and Pulses. I think that if I was to delve deeper, and edit my Netlists using a text-editor, I might be able to expand the range of possibilities…

But then I do think that a premise of how ‘SPICE’ works in general, is to state the Voltage as a Primary phenomenon, to which Current is Secondary. By that I mean, pure capacitors are simulated as having current, that is the derivative of voltage, while in pure inductors, the current is merely the integral of voltage. ( :2 ) And so, SPICE uses numerical approximations of both derivatives and integrals. ( :1 ) And in the many settings my GUI does offer me, I get to choose which method of integration out of two I prefer: ‘Trap’ or ‘Gear’.

The question could just pop into somebody’s head: ‘Methods of numerical integration were taught to me, which are more accurate than Trap, such as The 3-point Simpson’s Sum. (Actually, I was taught to compute 2/3 times the Midpoint, plus 1/3 times the Trap Sum, not their average.) Why can’t I select that?’ And the answer I would suggest is as follows: I already wrote a posting about the simplest method of numerical differentiation, and about how, if the step-size is too long, it can generate differentials which are too high in amplitude. If this was combined with an unsuitable method of integration, one of two paradoxical results could follow:

1. An LC tank circuit, aka a pure inductor connected to a pure capacitor, could end up unstable, gaining amplitude, or
2. The same, simulated circuit could lose momentum, apparently to nowhere, and stop ringing.

Either result is counter to what happens in Physics. And so it would seem that the medium-range errors in the Trap method, happen to complement the errors exactly, in the simplest method of differentiation. If the differentiation came into being because consecutive samples were subtracted, then simply to add them again, will reproduce what we started with. And so our pure, lossless resonant circuit, would resonate forever, as it should… The engine has no place for ‘dampened integrals’ here.

The other method available, ‘Gear’, is also known as ‘The Backward Differentiation Formula’, or the ‘BDF’. It’s mainly suited for trying to simulate systems which are ‘stiff’ i.e., where the step-interval is assumed to be too long, and where heavy bodies interact with great force, approximated with coarse time-steps. It’s like The Simpson’s Sum on steroids. I’ve heard bad things about it. One main reason not to use it, is the History by which it will stabilize a simulated circuit, while the same circuit, when actually etched into silicon, became unstable. There might be cases where only the Gear Method can be used, but it should be used as a last resort.

The (simpler) ‘Riemann Sum’ has as a problem, that it must either be conceptualized as being ‘left-handed’ or ‘right-handed’, which means, that each input sample must either represent an abstract rectangle that follows it, or that preceded it. With critically-sampled – i.e., long stepped – signals, doing so would introduce a phase-shift. The Trap Sum alleviates such a phase-shift.

(Updated 06/23/2018, 19h35 … )

Another Simple Output-Amplifier, Using Discrete MOSFET Transistors

One of the facts which I’ve been writing about, is that I possess the open-source version of ‘SPICE’, that is named ‘NG-SPICE’, and that this acronym stands for ‘Simulation Program, with Integrated Circuit Emphasis’. The full, associated suite of programs allows me to edit schematic diagrams graphically, but to export ‘Netlists’, so that I can then simulate the circuit – and see if it works.

And one of the facts which I have also been contemplating, is that by default, SPICE will put transistors, which correspond to micron-sized transistors, which will therefore never be able to drive output-loads, from a hypothetical IC, unless an explicit attempt is made, to design output-buffers, which can. These output-amplifiers have as function, that they should merely follow their input voltage, but draw as little current from their respective inputs as possible – that are outputs of other, more interesting ICs – while allowing low load-resistances to be connected to their own outputs, which correspond to plausible external components, such as 100Ω load-resistors.

I had posted an earlier, conceivable design, of such an output-buffer, which had a major flaw, that I also pointed out in the preceding posting: That amplifier could only produce a range of voltages, which was a direct function of what the Gate-Source threshold voltages would be, of the component transistors used. Hence, because I had also specified low-quality, outdated MOSFET transistors with high threshold-voltages, the output-voltage-range, was also modest but reasonable. But, newer transistors will have lower threshold voltages by design, which would, oddly enough, reduce the voltage-range of that amplifier. This would be an important consideration if the transistors were not in fact discrete, but needed to be incorporated onto the IC, where low-threshold-voltage transistors are already standard. Which means, that I needed to design a better output-buffer.

So below is a better output-buffer, schematic:

And these are the SPICE definitions, of the discrete transistors which I decided to base my design on again, both enhancement-mode MOSFETs:

http://dirkmittler.homeip.net/text/2N7000.mod.txt

http://dirkmittler.homeip.net/text/BS250P.mod.txt

The main disadvantage of this latest design would be, that the transistors which I labeled ‘X2′ and ‘X3′, do in fact conduct current to their combined inputs, which makes the additional transistor ‘X1′ necessary, since this amount of current would already be excessive, to connect to an output, of any pre-existing IC circuits. But then, the advantage goes so far, that ‘X2′ now models a level-shift, which exactly mirrors the level-shift of ‘X4′, and the voltage-level-shift of ‘X3′ now mirrors ‘X5′. There is design beauty in this. But one disadvantage now is, that the Gate-Source threshold-voltage of (1) n-Channel MOSFET (2.2V) plus (1) p-Channel MOSFET (3.2V) gets subtracted from the input-voltage, so that the available voltage-range still suffers, with respect to both the supply, and the input-voltage. Input-voltage now ranges from 5.4V to approximately 12.5V, which is closer to the range of supply-voltages than what the previous circuit allowed, and the resulting output-voltages are graphed below:

(Update 06/20/2018, 0h20 : )

There is another observation which I should add:

In the days of vacuum tubes, ‘transconductance’ was measured in Amperes / Volt, and was therefore given in ‘Mhos’, which were the reciprocal of Ohms. Apparently, in modern days, the transconductance of a MOSFET, also given as its ‘KP’, is in Amperes / Volt2 . This conscious design-decision must follow the real-world behavior of MOSFETs, but makes my earlier Math, of multiplying such a component-property by the series-resistance, to arrive at gain, incorrect. Gate-Source voltage-changes lead to current-changes, but greater Drain-Source voltages, lead to greater current-gain. This is good, because the actual gain of a MOSFET, reduces the apparent capacitance at its Gate.

The low-end output-voltage came into being as follows:

A Pertinent Question, about Micron-Sized Transistors

If we position two electrodes in free air, 1Centimeter apart, and if we then apply 10000Volts across them, the air’s ability to resist electric current will break down, and an electric arc will appear across it.

Because of this simple observation, the question could (and probably, should) be asked, ‘Can a MOSFET transistor the size of a micron, on an Integrated Circuit, withstand 15Volts of Source-Drain voltage, at all?’

A suggestion to the contrary would be, that 10000Volts /Centimeter, is equal to 1 Volt /Micron. Thus, if the two electrodes were 1Micron apart, and standing free in air, it would take only 1 Volt to cause the air to break down, and for a microscopic arc to appear. Yet, Integrated Circuits are known to exist, which operate at 2 Volts, and which use ‘nanometer technologies’. And so in an effort to answer my own question, I would take two further observations into consideration:

1. I already recall reading elsewhere, that the breakdown voltage of high-quality, semiconductor silicon, is considerably greater than that of air !
2. I possess a suite of programs named “SPICE”, which, when performing a Level-8 simulation of MOSFET transistors, only needs to be given the width and the length of a transistor-instance, and which will, on that basis, compute all the other properties of the resulting transistor, making certain assumptions about its design.

This use of SPICE has been commented on, on the following Bulletin-Board:

The part of the thread, which I’ve linked to before, and which I want to call the reader’s attention to, is the part where Holger Vogt writes:

“A 0.18µm process however should run at lower supply voltage, e.g. 1.8-2 V.”

A Simple Output-Amplifier, Using low-quality Discrete MOSFET Transistors

In This earlier posting, I described how I can use the program ‘NG-SPICE’, along with its associated GUI-applications, to create and edit circuit diagrams, and then to simulate approximately how those would function if actually implemented as circuits.

‘SPICE’ stands for ‘Simulation Program, with Integrated Circuit Emphasis’. And one of the facts which I had lamented in the posting linked to above, was that it tends to produce default transistors, that correspond to transistors one would find on an IC, those having sizes of 1 micron and smaller. Therefore I faced the challenge which I believe professional IC-designers also face, which is, to make circuits small that contain many transistors, yet, to drive output-pins of the ICs in such a way, that at least, discrete components can be connected to those output-leads, without doing so collapsing the output-waveforms.

But, my hypothetical solution to this problem will be different, from the professionally-chosen solution. What I think gets done commercially, is that special output-transistors are put on the IC, that take up greater surface-area there than unit transistors do, and which are difficult to diagram in a schematic faithfully, to how schematics depict discrete-transistor circuits. My solution was to accept the legacy n-Channel, ‘2N7000′, and the legacy p-Channel, ‘BS250P’, discrete, enhancement-mode MOSFET transistors, in the spirit that bipolar-transistor solutions are to be avoided, if the main chip-technology was MOSFET, but to mark these components as being ‘special’ – even though ages ago, the discrete components would have been regarded as ‘normal’, while the IC components would have been regarded as ‘special’, I defined those discrete components within NG-SPICE, as subcircuits, which are therefore labeled with descriptors that begin with the letter ‘X…’ , as opposed to native MOSFETs, that are to be labelled with the letter ‘M…’ .

Here are the subcircuit, Netlist-definitions of these two, now-defunct transistor-types:

http://dirkmittler.homeip.net/text/2N7000.mod.txt

http://dirkmittler.homeip.net/text/BS250P.mod.txt

I understand that this was to be an exercise, at amplifying the output of a hypothetical IC, as if with discrete components that would need to be connected to the IC externally, but remember, that equivalent, low-quality MOSFETs can be incorporated into any chips which are to be manufactured, so that in the event that they are, external components would not be necessary.

I also understand that my schematic is imperfect, in that it creates voltage-level-errors, but that such errors would become irrelevant, if the output-amplifier was put inside a feedback-loop, that has high, open-loop gain, as such a feedback loop would also just correct the voltage fed in to the circuit of this posting, so that correct output-voltages nevertheless follow.

This is the schematic:

One reason for the voltage-level errors is the fact that in this schematic, ‘X1′ and ‘X3′ do not match, and that equally, ‘X2′ and ‘X4′ do not match. Even though ‘X1′ and ‘X2′ were meant to model the threshold-voltage, with which each transistor turns on, and then to apply the correct level-shifts to the gates of ‘X3′ and ‘X4′, the main problem in my design is, that ‘X1′ is of the p-Channel type, while ‘X3′ is of the n-Channel type, and vice-versa. There was never any guarantee, that the positive threshold-voltage of the n-Channel transistor, exactly mirrors the negative threshold-voltage, of the p-Channel transistor! But, unless such an amplifier is to place a load-current onto the input-terminal, I found no simple way to avoid this situation. As it stands, the input-terminal would offer minimum load on the circuit designed in the posting linked to above, because all it drives is floating gates. All this does is add some capacitance, while the driven output-resistance of 100Ω, is a direct function of the fact that the chosen, discrete MOSFETs, were only able to handle 200mA maximally.

Interestingly enough, the direction of the level-shift between ‘X1′ and ‘X3′ is the same, as the direction in which ‘X2′ and ‘X4′ shift the voltage-levels, which means that ‘VSD(X1)’ + ‘VDS(X2)’ == ‘VGS(X3)’ + ‘VSG(X4)’, for which reason the circuit can be expected to work anyway. And, neither the Source-Drain current through ‘X1′, nor that through ‘X2′, ever reverse, over the operating range.

(Updated 06/16/2018 : )