Guessing at the discretization, of the Sallen-Key Filter, with Q-Multiplier.

One concept that exists in modern digital signal processing is, that a simple algorithm can often be written, to perform what old-fashioned, analog filters were able to do.

But then, one place where I find lacking progress – at least, where I can find the information posted publicly – is, about how to discretize slightly more complicated analog filters. Specifically, if one wants to design 2nd-order low-pass or high-pass filters, one approach which is often recommended is, just to chain the primitive low-pass or high-pass filters. The problem with that is, the highly damped frequency-response curve that follows, which is evident, in the attenuated voltage gain, at the cutoff frequency itself.

In analog circuitry, a solution to this problem exists in the “Sallen-Key Filter“, which naturally has a gain at the corner frequency of (-6db), which would also result, if two primitive filters were simply chained. But beyond that, the analog filter can be given (positive) feedback gain, in order to increase its Q-factor.

I set out to write some pseudo-code, for how such a filter could also be converted into algorithms…



for i from 1 to n
    Y[i] := ( k * Y[i-1] ) + ((1 - k) * X[i]) + Feedback[i-1]
    Z[i] := ( k * Z[i-1] ) + ((1 - k) * Y[i])
    Feedback[i] := (Z[i] - Z[i-1]) * k * α
    (output Z[i])

for i from 1 to n
    Y[i] := ( k * Y[i-1] ) + ((1 - k) * X[i]) + Feedback[i-1]
    Z[i] := ( k * (Z[i-1] + Y[i] - Y[i-1]) )
    Feedback[i] := Z[i] * (1 - k) * α
    (output Z[i])

for i from 1 to n
    Y[i] := ( k * (Y[i-1] + X[i] - X[i-1]) ) + Feedback[i-1]
    Z[i] := ( k * (Z[i-1] + Y[i] - Y[i-1]) )
    Feedback[i] := Z[i] * (1 - k) * α
    (output Z[i])


k is the constant that defines the corner frequency via ω, And
α is the constant that peaks the Q-factor.

ω = 2 * sin(π * F0 / h)
k = 1 / (1 + ω), F0 < (h / 4)

h   Is the sample-rate.
F0  Is the corner frequency.

To achieve a Q-factor (Q):
α = (2 + (sin^2(π * F0 / h) * 2) - (1 / Q))
'Damping Factor' = (ζ) = 1 / (2 * Q)

Critical Damping:
ζ = 1 / sqrt(2)
Q = 1 / sqrt(2)


(Algorithm Revised 2/08/2021, 23h40. )

(Computation of parameters Revised 2/09/2021, 2h15. )


(Updated 2/10/2021, 18h25… )

Continue reading Guessing at the discretization, of the Sallen-Key Filter, with Q-Multiplier.

Basic Colpitts Oscillator

One of the concepts which I’ve been exploring on my blog, concerns tuned circuits, and another concerns Voltage-Controlled Oscillators (VCOs). As one type of voltage-controlled oscillator, I have considered an Astable Multivibrator, which has as advantage a wide frequency-range, but which will eventually have as disadvantage, a limited maximum frequency, when the supply voltage is only 3V. There could be other more-complex types of VCOs that apply, when, say, 200MHz is needed, but one basic type of oscillator which will continue to work under such conditions, which has been known for a century, and which will require an actual Inductor – a discrete coil – is called the Colpitts Oscillator. Here is its basic design:


In this schematic I’ve left out actual component values because those will depend on the actual frequency, the available supply voltage, on whether a discrete transistor is to be used or an Integrated Circuit, on whether a bipolar transistor is to be used or a MOSFET… But there are nevertheless certain constraints on the component-values which apply. It’s assumed that C1 and C2 form part of the resonant “Tank Circuit” with L1, that in series, they define the frequency, and that they are to be made equal. C3 is not a capacitor with a critical value, instead to be chosen large enough, just to act as a coupling-capacitor at the chosen frequency (:2) . R2 is to be made consistent with the amount of bias current to flow through Q1, and R1 is chosen so that, as labelled, the correct bias voltage can be applied, in this case, to a MOSFET, without interfering with the signal-frequency, supplied through C3.

I’m also making the assumption that everything to the right of the dotted line would be put on a chip, while everything to the left of the dotted line would be supplied as external, discrete components. This is also why C3, a coupling capacitor, becomes possible.

The basic premise of this oscillator is that C1 and C2 do not only act as a voltage-divider, but that, when the circuit that forms between L1, C1 and C2 is resonant with a considerable Q-factor (>= 5), C1 and C2 actually act as though they were a centre-tapped auto-transformer. If this circuit was not resonating, the behaviour of C1 and C2 would not be so. But as long as it is, it’s possible for a driving voltage, together with a driving current, to be supplied to the connection between C1 and C2, in this case by the Source of Q1, and that the voltage which will form where C1 connects with both L1 and the Gate of Q1 (that last part, through C3), will essentially be the former, driving voltage doubled. Therefore, all that needs to happen on the part of the active component, is to form a voltage-follower, between its Gate and Source, so that the voltage-deviations at the Source, follow from those at the Gate, with a gain greater than (0.5). If that can be achieved, the open-loop gain of this circuit will exceed (1.0), and it will resonate.

It goes without say that C1 and C2 will also isolate whatever DC voltage may exist at the Source of Q1, from the DC voltage of L1.


There is a refinement to be incorporated, specifically to achieve a VCO. Some type of varactor needs to be connected in parallel with L1, so that low-frequency voltage-changes on the varactor will change the frequency at which this circuit oscillates, because by definition, a varactor adds variable capacitance.

What some sources will suggest is that, the best way to add a varactor to this circuit will be, to put yet-another coupling capacitor, and a resistor, the latter of which supplies the low-frequency voltage to the varactor. But I would urge my reader to be more-creative, in how a varactor could be added. One way I could think of might be, to get rid of R1 and C3, and instead of terminating L1 together with C2 to ground, to terminate them to the supply voltage, thus ensuring that Q1 is biased ‘On’, even though the coupling capacitor C3 would have been removed in that scenario. What would be the advantage in this case? The fact that The varactor could be implemented on-chip, and not supplied as yet-another, external, discrete component, many of which would eat up progressively more space on a circuit-board, as a complex circuit is being created.

I should also add that some problems will result, if the capacitance to be connected in parallel with L1 becomes as large, as either C1 or C2. An eventual situation will result, in which C1 and C2 stop acting, as though they formed a (voltage-boosting) auto-transformer. An additional voltage-divider would form, between C1 in this case, and the added, parallel capacitance. And this gives more food for thought. (:1)


(Possible Usage Scenario : )

(Updated 7/29/2019, 14h45 … )

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About the Amplitudes of a Discrete Differential

One of the concepts which exist in digital signal processing, is that the difference between two consecutive input samples (in the time-domain) can simply be output, thus resulting in a differential of some sort, even though the samples of data do not represent a continuous function. There is a fact which must be observed to occur at (F = N / 2) – i.e. when the frequency is half the Nyquist Frequency, of (h / 2) , if (h) is the sampling frequency.

The input signal could be aligned with the samples, to give a sequence of [s0 … s3] equal to

0, +1, 0, -1

This set of (s) is equivalent to a sine-wave at (F = N / 2) . Its discrete differentiation [h0 … h3] would be

+1, +1, -1, -1

At first glance we might think, that this output stream has the same amplitude as the input stream. But the problem becomes that the output stream is by same token, not aligned with the samples. There is an implicit peak in amplitudes between (h0) and (h1) which is greater than (+1) , and an implicit peak between (h2) and (h3) more negative than (-1) . Any adequate filtering of this stream, belonging to a D/A conversion, will reproduce a sine-wave with a peak amplitude greater than (1).

(Edit 03/23/2017 : )

In this case we can see, that samples h0 and h1 of the output stream, would be phase-shifted 45⁰ with respect to the zero crossings and to the peak amplitude, that would exist exactly between h0 and h1. Therefore, the amplitude of h0 and h1 will be the sine-function of 45⁰ with respect to this peak value, and the actual peak would be (the square root of 2) times the values of h0 and h1.

(Erratum 11/28/2017 —

And so a logical question which anybody might want an answer to would be, ‘Below what frequency does the gain cross unity gain?’ And the answer to that question is, somewhat obscurely, at (N/3) . This is a darned low frequency in practice. If the sampling rate was 44.1kHz, this is achieved somewhere around 7 kHz, and music, for which that sampling rate was devised, easily contains sound energy above that frequency.

Hence the sequences which result would be:

s = [ +1, +1/2, -1/2, -1, -1/2, +1/2 ]

h = [ +1/2, -1/2, -1, -1/2, +1/2, +1 ]

What follows is also a reason for which by itself, DPCM offers poor performance in compressing signals. It usually needs to be combined with other methods of data-reduction, thus possibly resulting in the lossy ADPCM. And another approach which uses ADPCM, is aptX, the last of which is a proprietary codec, which minimizes the loss of quality that might otherwise stem from using ADPCM.

I believe this observation is also relevant to This Earlier Posting of mine, which implied a High-Pass Filter with a cutoff frequency of 500 Hz, that would be part of a Band-Pass Filter. My goal was to obtain a gain of at most 0.5 , over the entire interval, and to simplify the Math.

— End of Erratum. )

(Posting shortened here on 11/28/2017 . )