June 10, 2021

There are two equations which I hold to be true, having to do with the Characteristic Impedance (Z${}_{0}$) and Propagation Delay (TD) of a Transmission Line, based on their Linear Inductance (L${}_{l}$) and Linear Capacitance (C${}_{l}$). Those equations are:

${Z}_{0}=\sqrt{\frac{{L}_{l}}{{C}_{l}}}$,

$TD=\sqrt{{L}_{l}{C}_{l}}\bullet \left(len\right)$.

Where (len) represents the length of the transmission line, according to the same units as (L${}_{l})$and (C${}_{l}).$In order to simplify the Math, I’m going to assume that the length unit is 30cm, which the speed of light should traverse in 1nS, and that (len = 1).

This article will refer to a number of URLs, most importantly of this document:

https://www.ultracad.com/mentor/microstrip%20propagation.pdf

This document states that, at least approximatively, the factor of increase of propagation delay, if a copper trace has been put on one side of a PCB, with a Ground Plane on the opposite side, corresponding to a Microstrip, is:

$\mathit{\epsilon}{\prime}_{\gamma}=0.475{\mathit{\epsilon}}_{\gamma}+0.67$

I will take (${\mathit{\epsilon}}_{\gamma}$) to be 4.3 and not 4.

It should follow that ($\sqrt{\mathit{\epsilon}{\prime}_{\gamma}}$) cannot exceed 2.08, and indeed, this term would follow as 1.647... .

However, through a rigorous application of available equations, I obtain a much slower propagation delay. Firstly, I’d refer to the following URL, to compute what (Z${}_{0}$) is, when the thickness of the trace is 1.2mil, its width is 0.25mm, and the Isolation Height is 63mil. The value that follows is 134.5$\Omega $:

https://www.pcbway.com/pcb_prototype/impedance_calculator.html

Additionally, the following on-line resource can be used, to determine the inductance of 30cm of the same trace:

https://chemandy.com/calculators/ﬂat-wire-inductor-calculator.htm

Here, the thickness of 1.2mil has been converted to 0.03048mm. [$L@\left(len\right)=30cm$] would seem to follow as 490nH. The ﬁrst equation above can be restated as:

$C=\frac{L}{{\left({Z}_{0}\right)}^{2}}=27pF$

It should be possible to plug this value back into the second equation above, to evaluate:

$TD=\sqrt{27pF\bullet 490nH}=3.64nS$ !!

$3.64\nsim 1.647$ !!

Unfortunately, in spite of how this result deviates from the cited document, it ‘makes sense’. If the main point of the document was to say, that the propagation delay of a microstrip is an interpolated value, between that in free space, and that due entirely due to the dielectric constant (${\mathit{\epsilon}}_{\gamma}$), then this rationale seems to overlook entirely, what role the variable proximity of the Ground Plane should play, which, according this article’s alternative should be, to slow the propagation further, than just by a factor of 1.647. Capacitance with the Ground Plane should have the ability to slow propagation more dramatically, and the result of the Math in this article seems plausible.

In short, the critical question to my mind should not just be, ‘What percentage of the lines of electrostatic ﬂux pass through the dielectric?’ It should also matter, How much capacitance has been drawn through the dielectric.

If this is true, then, even PCB traces just along the surface of the dielectric - when there is no Ground Plane - should generate a(n irrelevant) compromise between the two presented permittivities.

Even though it might be a correct point of comparison, in theory, to say, that a PCB trace laid down on one side of the PCB, with no Ground Plane on the other side, is already a candidate for the analysis, that ‘half its lines of electrostatic ﬂux’ are passing through the dielectric, and not through air... The reason why this situation does not aﬀect the propagation speed appreciably, is the fact, that ~most~ PCBs are at most 1mm thick. If the value of (Z${}_{0}$) obtained, when a signal passes along a 14-guage wire through space or air, is approximately 350$\Omega $, then the on-line calculator arrives at the same result, due to 13mm of air (and a Ground Plane). However, if (${\mathit{\epsilon}}_{\gamma}=4$), then a PCB thickness of ~4mm would be required (according to the calculator), to result in ~4 times the original amount of capacitance, thereby bringing (Z${}_{0}$) down to 173.2$\Omega .$

In an approximative way, I’d say that If (thickness)$\le \left[\frac{12}{\left({\mathit{\epsilon}}_{\gamma}\right)-1}\right]$mm, it would need to be multiplied by [$\frac{{\left({\mathit{\epsilon}}_{\gamma}-1\right)}^{2}}{12}mm$] to arrive at the amount of added capacitance relative to ‘space capacitance’. Therefore, the depth of the dielectric is not usually suﬃcient, for the propagation delay of a free PCB trace to be slowed considerably, which the reader is reminded, follows as the square root of the capacitance.

So, which version is ultimately correct?

Dirk Mittler.